At least eight years of experience with at least two in deep submicron CMOS technologies.
At least ten years of experience in CMOS analog design and two or more years on converter design.
Experience in >10M gate designs in deep submicron technologies. DFT understanding required.
Experience in verification of high data throughput, large digital designs.
Customer focused individual with excellent verbal and written communication skills and experience with converter based products. RF skills desirable.
Significant lab experience at frequencies above 10 GHz. Understanding of standard converter testing methodologies and techniques.
We work closely with customers to understand their application and how our data converter technology can enable higher performance, lower power, and smaller systems.
Our highly experienced team of CMOS design and layout engineers are working in the leading edge 14nm FinFET CMOS node, taking advantage of the analog performance to realize the lowest power highest performing converters on the market.
ASIC and Digital
We help our customers realize their ASICs through various development and partnership models. We have digital design and verification engineers on staff to work at any engagement level.