IP (Intellectual Property)
Build your ASIC with proven IP
Contact for more information: sales@jariettech.com
Kern IP:
• 64 GSPS 10-bit ADC, calibrated to 12-bit
• 64 GSPS 10-bit DAC, calibrated to improve spurious
• 32 GHz PLL/VCO (for 64 GSPS operation)
• Converter Analog Range: 100MHz – 36GHz
• Radiation Hardened By Design (RHBD)
• Includes a Central Processing Unit (CPU)
• Fully controlled through firmware API calls
• FW handles synchronization, calibration, health
• External clock @fs/2 for lower phase noise
• Process: GlobalFoundries 12nm LP FinFET
• Power: 1.6W @64GSPS, 1W @40GSPS
• Size: ~2.1 mm x ~2.0 mm
• Proven in silicon